1. Field of the Invention
The invention relates to a method for forming a protection layer on the semiconductor, particularly to a method for forming an interfacial passivation layer on the germanium semiconductor.
2. Description of the Prior Art
At present, the development trend for the manufacturing technology of the integrated circuit (IC) is still kept to the trend of miniaturizing transistor size, in order to reach the goal of high efficacy and high density. Due to the efficacy of conventional polycrystalline silicon/silicon dioxide/silicon channel metal-oxide-semiconductor field effect transistor is unable to be increased by the miniaturizing technology, thus, how to increase the mobility of carrier and the dielectric capacitance of gate has become the key technology and goal for the development of field effect transistor in the next generation. Wherein, the mobility for the electron and hole of Ge semiconductor is 2 times and 4 times higher than those of silicon, respectively. The basic process is similar to the silicon semiconductor technology. Thus, the germanium metal-oxide-semiconductor field-effect transistor (Ge-MOSFET) has been considered as the most promising candidate for the next generation of semiconductor industry.
In the past development process of Ge-MOSFET, various different gate insulators had been tried, such as the germanium dioxide (GeO2), silicon dioxide (SiO2), or the material with high dielectric constant (high-k), such as hafnium dioxide (HfO2), aluminum dioxide (Al2O3), in order to improve the capacitor coupling ability of gate insulator layer. However, large density of state contained between the high-k dielectric and germanium channel, and diffusion of germanium in high-k dielectric during inevitable thermal process, result in threshold voltage shift and gate leakage current increasing.
According to prior art, introduce a thin high-quality protection layer between high-k dielectric film and germanium semiconductor is able to prevent the generation of defect on germanium interface, wherein the germanium dioxide has the best efficacy.
In the US Patent No. 2006/0099872 of “Method for forming an interface between germanium and other materials”, the sulfide, such as H2S or SF6 is used to form an interface on semiconductor surface. The process is still a conventional method, and the interface has to be formed before gate insulator layer deposition. Thus, the interface is unable to be formed after the gate insulator deposition, and the defect generation in gate insulator could occur again during sequent thermal process.
In the US Patent No. 2006/0292872A1 of “Atomic layer deposition of thin films on Germanium”, before the method of atomic layer deposition is used to grow gate insulator layer with high dielectric constant, the germanium oxynitride is formed at the interface. The process temperature could be too high, and the interface is unable to be formed after the gate insulator deposition, and the defects could generate in gate insulator during sequent thermal process
In the US Patent No. 2007/0099398A1 of “Method and system for forming A nitride Germanium-containing layer using plasma processing”, the plasma method is used to form the germanium nitride, the germanium dioxide or the nitride germanium oxide as the interface. Although it is a low-temperature process, it requires the vacuum system, only the interface is able to be formed. The interface is unable to be formed after the gate insulator deposition, and the defects could generate in gate insulator during sequent thermal process.
In current Ge-MOSFET manufacture process, it is inevitable to use the high-temperature process (such as dopant activation after the ion implantation or the annealing process after the metal sputtering). It will always cause the significant thermal diffusion of germanium and the surface damage of germanium. The poor thermal stability of germanium oxide cause chemical reaction of germanium oxide and germanium substrate. Sequent thermal decomposition of germanium oxide results poor interface between gate dielectric and germanium substrate, and thermal diffusion of germanium in gate dielectric. Thus, how to develop a low-temperature process to form a high-quality protection layer between germanium substrate and gate dielectric layer to prevent the generation of defect has become an important gate engineering technology.
Therefore, in order to produce more efficient germanium semiconductor surface protection layer technology, provide the industry to grasp better production process, and apply it on the manufacturing of Ge-MOSFET, it is necessary to research and develop the innovative method for forming an interfacial passivation layer on the germanium semiconductor, to improve the production efficiency for the interfacial passivation layer on the germanium semiconductor and reduce the manufacturing cost of the semiconductor.